Infineon C7 GOLD Type N-Channel MOSFET & Diode, 83 A, 650 V Enhancement, 10-Pin HDSOP

Voir l’ensemble des MOSFETs

Sous-total (1 bobine de 1700 unités)*

3 835,20 €

(TVA exclue)

4 641,00 €

(TVA incluse)

Add to Basket
sélectionner ou taper la quantité
En stock
  • Plus 1 700 unité(s) expédiée(s) à partir du 01 janvier 2026
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité
Prix par unité
la bobine*
1700 +2,256 €3 835,20 €

*Prix donné à titre indicatif

N° de stock RS:
220-7417
Référence fabricant:
IPDD60R080G7XTMA1
Fabricant:
Infineon
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout

Marque

Infineon

Channel Type

Type N

Product Type

MOSFET & Diode

Maximum Continuous Drain Current Id

83A

Maximum Drain Source Voltage Vds

650V

Package Type

HDSOP

Series

C7 GOLD

Mount Type

Surface

Pin Count

10

Maximum Drain Source Resistance Rds

80mΩ

Channel Mode

Enhancement

Forward Voltage Vf

0.8V

Maximum Power Dissipation Pd

174W

Maximum Gate Source Voltage Vgs

20 V

Typical Gate Charge Qg @ Vgs

42nC

Standards/Approvals

No

Length

6.6mm

Width

2.35 mm

Height

21.11mm

Automotive Standard

No

The Infineon technologies introduces Double DPAK (DDPAK), the first top-side cooled surface mount device (SMD) package addressing high power SMPS applications such as PC power, solar, server and telecom. The benefits of the already existing high voltage technology 600V Cool MOS G7 super junction (SJ) MOSFETis combined with the innovative concept of top-side cooling, providing a system solution for high current hard switching topologies such as PFC and a high-end efficiency solution for LLC topologies.

Gives best-in-class FOM RDS(on) x Eoss and RDS(on) x Qg

Innovative top-side cooling concept

Inbuilt 4th pin Kelvin source configuration and low parasitic source inductance

TCOB capability of >> 2.000 cycles, MSL1 compliant and total Pb-free

Enabling highest energy efficiency

Thermal decoupling of board and semiconductor allows to overcome thermal PCB limits

Reduced parasitic source inductance improves e efficiency and ease-of-use

Enables higher power density solutions

Exceeding the highest quality standards

Liens connexes