Nexperia 74HC597D,653 8-stage Surface Mount Shift Register 74HC, 16-Pin SOIC
- N° de stock RS:
- 170-8019
- Référence fabricant:
- 74HC597D,653
- Fabricant:
- Nexperia
Sous-total (1 bobine de 2500 unités)*
492,50 €
(TVA exclue)
595,00 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
Temporairement en rupture de stock
- 5 000 unité(s) expédiée(s) à partir du 27 mai 2026
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | la bobine* |
|---|---|---|
| 2500 + | 0,197 € | 492,50 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 170-8019
- Référence fabricant:
- 74HC597D,653
- Fabricant:
- Nexperia
Spécifications
Documentation technique
Législations et de normes
Détails du produit
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Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Nexperia | |
| Package Type | SO | |
| Logic Function | Shift Register | |
| Number of Stages | 8 | |
| Logic Family | 74HC | |
| Mounting Type | Surface Mount | |
| Operation Mode | Parallel to Serial | |
| Number of Elements | 1 | |
| Pin Count | 16 | |
| Minimum Operating Supply Voltage | 2 V | |
| Maximum Operating Supply Voltage | 6 V | |
| Dimensions | 10 x 4 x 1.45mm | |
| Maximum Operating Temperature | 125 °C | |
| Minimum Operating Temperature | -40 °C | |
| Direction Type | Uni-Directional | |
| Triggering Type | Positive Edge | |
| Reset Type | Asynchronous | |
| Sélectionner tout | ||
|---|---|---|
Marque Nexperia | ||
Package Type SO | ||
Logic Function Shift Register | ||
Number of Stages 8 | ||
Logic Family 74HC | ||
Mounting Type Surface Mount | ||
Operation Mode Parallel to Serial | ||
Number of Elements 1 | ||
Pin Count 16 | ||
Minimum Operating Supply Voltage 2 V | ||
Maximum Operating Supply Voltage 6 V | ||
Dimensions 10 x 4 x 1.45mm | ||
Maximum Operating Temperature 125 °C | ||
Minimum Operating Temperature -40 °C | ||
Direction Type Uni-Directional | ||
Triggering Type Positive Edge | ||
Reset Type Asynchronous | ||
The 74HC595, 74HCT595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.
Simple control interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units