Infineon NOR 512 MB SPI Flash Memory 8-Pin, S25HL512TFAMHI010
- N° de stock RS:
- 273-5426
- Référence fabricant:
- S25HL512TFAMHI010
- Fabricant:
- Infineon
Offre groupée disponible
Sous-total (1 unité)*
10,01 €
(TVA exclue)
12,11 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
En stock
- Plus 28 unité(s) expédiée(s) à partir du 15 décembre 2025
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Unité | Prix par unité |
|---|---|
| 1 - 9 | 10,01 € |
| 10 - 24 | 9,27 € |
| 25 - 49 | 7,93 € |
| 50 + | 7,78 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 273-5426
- Référence fabricant:
- S25HL512TFAMHI010
- Fabricant:
- Infineon
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Infineon | |
| Product Type | Flash Memory | |
| Memory Size | 512MB | |
| Interface Type | SPI | |
| Pin Count | 8 | |
| Maximum Clock Frequency | 166MHz | |
| Cell Type | NOR | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 1.7V | |
| Minimum Operating Temperature | -40°C | |
| Standards/Approvals | ISO26262 ASIL B and ASIL D ready | |
| Automotive Standard | AEC-Q1 Grade 1 | |
| Supply Current | 53mA | |
| Series | SEMPER Flash | |
| Sélectionner tout | ||
|---|---|---|
Marque Infineon | ||
Product Type Flash Memory | ||
Memory Size 512MB | ||
Interface Type SPI | ||
Pin Count 8 | ||
Maximum Clock Frequency 166MHz | ||
Cell Type NOR | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 1.7V | ||
Minimum Operating Temperature -40°C | ||
Standards/Approvals ISO26262 ASIL B and ASIL D ready | ||
Automotive Standard AEC-Q1 Grade 1 | ||
Supply Current 53mA | ||
Series SEMPER Flash | ||
The Infineon Flash Memory is a Quad SPI family of products which has high speed CMOS, MIRRORBIT™ NOR Flash devices. This flash memory is designed for functional safety with development according to ISO 26262 standard to achieve ASIL B compliance and ASIL D readiness. Read operations from the device are burst oriented. Read transactions can be configured to use either a wrapped or linear burst. Wrapped bursts read from a single page whereas linear bursts can read the whole memory array.
Legacy Block protection
SDR option runs up to 21 MBps
OTP secure silicon array of 1024 bytes
Serial flash discoverable parameters
Minimum 100000 program and erase cycles
Liens connexes
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