5T9306NLGI, Clock Buffer LVDS, 1-Input, 8-Pin SOIC
- N° de stock RS:
- 216-6188
- Référence fabricant:
- 5T9306NLGI
- Fabricant:
- Renesas Electronics
Sous-total (1 unité)*
11,18 €
(TVA exclue)
13,53 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
Dernier stock RS
- 475 dernière(s) unité(s), prête(s) à l'envoi d'un autre centre de distribution
Unité | Prix par unité |
|---|---|
| 1 + | 11,18 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 216-6188
- Référence fabricant:
- 5T9306NLGI
- Fabricant:
- Renesas Electronics
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Renesas Electronics | |
| Logic Family | LVDS | |
| Logic Function | Clock Buffer | |
| Input Signal Type | LVDS | |
| Number of Clock Inputs | 1 | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Sélectionner tout | ||
|---|---|---|
Marque Renesas Electronics | ||
Logic Family LVDS | ||
Logic Function Clock Buffer | ||
Input Signal Type LVDS | ||
Number of Clock Inputs 1 | ||
Package Type SOIC | ||
Pin Count 8 | ||
The Renesas Electronics IDT5T9306 2.5V differential clock buffer is a user-selectable differential input to six LVDS outputs. The fanout from a differential input to six LVDS outputs reduces loading on the preceding driver and provides an efficient clock distribution network. The IDT5T9306 can act as a translator from a differential HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input to LVDS outputs. A single-ended 3.3V / 2.5V LVTTL input can also be used to translate to LVDS outputs.
Guaranteed Low Skew < 40ps (max)
Very low duty cycle distortion < 125ps (max)
High speed propagation delay < 1.75ns (max)
Additive phase jitter, RMS 0.159ps (typical) @ 125MHz
Up to 1GHz operation
Selectable inputs
Hot insertable and over-voltage tolerant inputs
3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL
(3.3V), CML, or LVDS input interface
Selectable differential inputs to six LVDS outputs
Power-down mode
2.5V VDD
Available in VFQFPN package
Very low duty cycle distortion < 125ps (max)
High speed propagation delay < 1.75ns (max)
Additive phase jitter, RMS 0.159ps (typical) @ 125MHz
Up to 1GHz operation
Selectable inputs
Hot insertable and over-voltage tolerant inputs
3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL
(3.3V), CML, or LVDS input interface
Selectable differential inputs to six LVDS outputs
Power-down mode
2.5V VDD
Available in VFQFPN package