Renesas Electronics 2305-1DCG8 Clock Buffer 8-Pin SOIC
- N° de stock RS:
- 216-6133
- Référence fabricant:
- 2305-1DCG8
- Fabricant:
- Renesas Electronics
Sous-total (1 bobine de 3000 unités)*
1 743,00 €
(TVA exclue)
2 109,00 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
Temporairement en rupture de stock
- Expédition à partir du 25 mai 2026
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Unité | Prix par unité | la bobine* |
|---|---|---|
| 3000 + | 0,581 € | 1 743,00 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 216-6133
- Référence fabricant:
- 2305-1DCG8
- Fabricant:
- Renesas Electronics
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 133MHz | |
| Maximum Propagation Delay Time | 250ps | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Number of Outputs | 5 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Series | 2305-1DCG | |
| Height | 1.75mm | |
| Length | 5mm | |
| Standards/Approvals | No | |
| Width | 4 mm | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Renesas Electronics | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 133MHz | ||
Maximum Propagation Delay Time 250ps | ||
Mount Type Surface | ||
Package Type SOIC | ||
Pin Count 8 | ||
Number of Outputs 5 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Series 2305-1DCG | ||
Height 1.75mm | ||
Length 5mm | ||
Standards/Approvals No | ||
Width 4 mm | ||
Automotive Standard No | ||
The Renesas Electronics IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.
10MHz to 133MHz operating frequency
Distributes one clock input to one bank of five outputs
Zero Input-Output Delay
Output Skew < 250ps
Low jitter <200 ps cycle-to-cycle
IDT2305-1 for Standard Drive
IDT2305-1H for High Drive
No external RC network required
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