Infineon, 32bit ARM Cortex M0, CY8C4100 Microcontroller, 24MHz, 128 kB Flash, 64-Pin TQFP

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Sous-total (1 plateau de 90 unités)*

423,72 €

(TVA exclue)

512,73 €

(TVA incluse)

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  • Expédition à partir du 16 décembre 2026
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Prix par unité
le plateau*
90 - 904,708 €423,72 €
180 - 3604,486 €403,74 €
450 +4,331 €389,79 €

*Prix donné à titre indicatif

N° de stock RS:
176-8942
Référence fabricant:
CY8C4127AXI-S445
Fabricant:
Infineon
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Marque

Infineon

Family Name

CY8C4100

Package Type

TQFP

Mounting Type

Surface Mount

Pin Count

64

Device Core

ARM Cortex M0

Data Bus Width

32bit

Program Memory Size

128 kB

Maximum Frequency

24MHz

RAM Size

16 kB

USB Channels

0

Number of PWM Units

1 x 16 bit

Number of SPI Channels

5

Number of USART Channels

0

Typical Operating Supply Voltage

1.8 → 5.5 V

Number of UART Channels

5

Number of I2C Channels

5

Number of CAN Channels

1

Length

14.05mm

ADCs

2 x 10/12 bit

Maximum Number of Ethernet Channels

0

Number of PCI Channels

0

Number of LIN Channels

0

Number of ADC Units

1

Instruction Set Architecture

Thumb-2

Maximum Operating Temperature

+85 °C

Number of Ethernet Channels

0

Pulse Width Modulation

1 (8 x 16 bit)

Dimensions

14.05 x 14.05 x 1.45mm

Width

14.05mm

Program Memory Type

Flash

Height

1.45mm

Minimum Operating Temperature

-40 °C

PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200_BL product family, based on this platform, is a combination of a microcontroller with an integrated Bluetooth Low Energy (BLE), also known as Bluetooth Smart, radio and subsystem (BLESS).

Four opamps with reconfigurable high-drive external and high-bandwidth internal drive, Comparator modes, and ADC input buffering capability Can operate in Deep Sleep mode.
Four programmable logic blocks called universal digital blocks, (UDBs), each with eight macrocells and data path
Cypress-provided peripheral component library, user-defined state machines, and Verilog input
Power Management:
Active mode: 1.7 mA at 3-MHz flash program execution
Deep Sleep mode: 1.5 μA with watch crystal oscillator

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