Références fabricant

Nexperia 74HCT573D,652 8bit-Bit Latch, Transparent D Type, 3 State, 20-Pin SOIC

N° de stock RS:: 177-6916
Référence fabricant:: 74HCT573D,652
Fabricant:: Nexperia

Nexperia 74HCT573D,652 8bit-Bit Latch, Transparent D Type, 3 State, 20-Pin SOIC

Offre groupée disponible

Sous-total (1 unité)*

0,48 €

(TVA exclue)

0,58 €

(TVA incluse)

Informations sur le stock actuellement non accessibles - Veuillez vérifier plus tard

Unité	Prix par unité
1 - 29	0,48 €
30 - 59	0,38 €
60 - 99	0,37 €
100 - 249	0,35 €
250 +	0,34 €

*Prix donné à titre indicatif

N° de stock RS:: 177-6916
Référence fabricant:: 74HCT573D,652
Fabricant:: Nexperia

Spécifications

Documentation technique

Législations et de normes

Détails du produit

Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.

Sélectionner tout	Attribut	Valeur
	Marque	Nexperia
	Logic Family	HCT
	Latch Mode	Transparent
	Latching Element	D Type
	Number of Bits	8bit
	Output Type	3 State
	Polarity	Non-Inverting
	Mounting Type	Surface Mount
	Package Type	SOIC
	Pin Count	20
	Dimensions	13 x 7.6 x 2.45mm
	Height	2.45mm
	Length	13mm
	Minimum Operating Supply Voltage	4.5 V
	Maximum Operating Temperature	+125 °C
	Width	7.6mm
	Minimum Operating Temperature	-40 °C
	Maximum Operating Supply Voltage	5.5 V

	Sélectionner tout
	Marque Nexperia
	Logic Family HCT
	Latch Mode Transparent
	Latching Element D Type
	Number of Bits 8bit
	Output Type 3 State
	Polarity Non-Inverting
	Mounting Type Surface Mount
	Package Type SOIC
	Pin Count 20
	Dimensions 13 x 7.6 x 2.45mm
	Height 2.45mm
	Length 13mm
	Minimum Operating Supply Voltage 4.5 V
	Maximum Operating Temperature +125 °C
	Width 7.6mm
	Minimum Operating Temperature -40 °C
	Maximum Operating Supply Voltage 5.5 V

The 74HC573, 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state.

Mixed 5 V and 3.3 V applications

Save board space

Low cost interface solutions

Improved signal integrity for complex layouts

Wide supply voltage range

Low propagation delay

Overvoltage tolerant

Source termination

Low input threshold

CMOS low power

Key applications

Memory controllers

Backplane interfaces

Nexperia 74HCT573D,652 8bit-Bit Latch, Transparent D Type, 3 State, 20-Pin SOIC

Liens connexes