Références fabricant

Nexperia 74HCT573D,652 8-Bit Latch, Transparent, 3 State, 20-Pin SOIC

N° de stock RS:: 124-2269
Référence fabricant:: 74HCT573D,652
Fabricant:: Nexperia

Nexperia 74HCT573D,652 8-Bit Latch, Transparent, 3 State, 20-Pin SOIC

Actuellement indisponible

Nous ne savons pas si cet article sera de nouveau disponible. RS a l'intention de le retirer de son assortiment sous peu.

Produit de remplacement

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Nexperia 74HCT573D,653 8-Bit D Type Latch, Transparent, 3 State, 20-Pin SO

N° de stock RS: 170-7988

L'unité (sur une bobine de 2000)

0,279 €

(TVA exclue)

0,338 €

(TVA incluse)

N° de stock RS:: 124-2269
Référence fabricant:: 74HCT573D,652
Fabricant:: Nexperia

Spécifications

Documentation technique

Législations et de normes

Détails du produit

Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.

Sélectionner tout	Attribut	Valeur
	Marque	Nexperia
	Product Type	Latch
	Logic Family	HCT
	Logic Function	D Type
	Latch Mode	Transparent
	Number of Bits	8
	Number of Channels	1
	Output Type	3 State
	Polarity	Non-Inverting
	Mount Type	Surface
	Package Type	SOIC
	Minimum Supply Voltage	4.5V
	Pin Count	20
	Maximum Supply Voltage	5.5V
	Maximum Propagation Delay Time @ CL	45ns
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	125°C
	Height	2.45mm
	Length	13mm
	Width	7.6 mm
	Standards/Approvals	JEDEC No. 7A
	Automotive Standard	No

	Sélectionner tout
	Marque Nexperia
	Product Type Latch
	Logic Family HCT
	Logic Function D Type
	Latch Mode Transparent
	Number of Bits 8
	Number of Channels 1
	Output Type 3 State
	Polarity Non-Inverting
	Mount Type Surface
	Package Type SOIC
	Minimum Supply Voltage 4.5V
	Pin Count 20
	Maximum Supply Voltage 5.5V
	Maximum Propagation Delay Time @ CL 45ns
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 125°C
	Height 2.45mm
	Length 13mm
	Width 7.6 mm
	Standards/Approvals JEDEC No. 7A
	Automotive Standard No

Pays d'origine :: TH

The 74HC573, 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state.

Mixed 5 V and 3.3 V applications

Save board space

Low cost interface solutions

Improved signal integrity for complex layouts

Wide supply voltage range

Low propagation delay

Overvoltage tolerant

Source termination

Low input threshold

CMOS low power

Key applications

Memory controllers

Backplane interfaces

Nexperia 74HCT573D,652 8-Bit Latch, Transparent, 3 State, 20-Pin SOIC

Produit de remplacement

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