Toshiba 74VHC138FT, Decoder, 16-Pin TSSOP
- RS Stock No.:
- 171-3433
- Mfr. Part No.:
- 74VHC138FT
- Brand:
- Toshiba
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Subtotal (1 pack of 50 units)*
11,75 €
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14,20 €
(inc. VAT)
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Units | Per unit | Per Pack* |
|---|---|---|
| 50 - 100 | 0,235 € | 11,75 € |
| 150 - 450 | 0,174 € | 8,70 € |
| 500 - 950 | 0,157 € | 7,85 € |
| 1000 + | 0,142 € | 7,10 € |
*price indicative
- RS Stock No.:
- 171-3433
- Mfr. Part No.:
- 74VHC138FT
- Brand:
- Toshiba
Specifications
Technical Reference
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Marque | Toshiba | |
| Logic Family | 74VHC | |
| Product Type | Decoder | |
| Logic Function | Decoder | |
| Number of Inputs | 3 | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Number of Outputs | 34 | |
| Pin Count | 16 | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | 125°C | |
| Maximum Operating Temperature | -40°C | |
| Series | 74VHC | |
| Standards/Approvals | No | |
| Length | 5mm | |
| Width | 4.4 mm | |
| Height | 1.2mm | |
| Automotive Standard | AEC-Q100 | |
| Select all | ||
|---|---|---|
Marque Toshiba | ||
Logic Family 74VHC | ||
Product Type Decoder | ||
Logic Function Decoder | ||
Number of Inputs 3 | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Number of Outputs 34 | ||
Pin Count 16 | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature 125°C | ||
Maximum Operating Temperature -40°C | ||
Series 74VHC | ||
Standards/Approvals No | ||
Length 5mm | ||
Width 4.4 mm | ||
Height 1.2mm | ||
Automotive Standard AEC-Q100 | ||
The 74VHC138FT is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs ( Y0 - Y7 ) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high. G1, G2A , and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.
Wide operating temperature: Topr = -40 to 125
High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
High noise immunity: VNIH = VNIL = 28 % VCC (min)
Power-down protection is provided on all inputs.
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 5.5 V
Low noise: V = 0.8 V (max)