Nexperia 74HCT373D,652 D Type Latch, 8-Bit Non-Inverting, 20-Pin SO
- N° de stock RS:
- 170-8071
- Référence fabricant:
- 74HCT373D,652
- Fabricant:
- Nexperia
Informations sur le stock actuellement non accessibles
- N° de stock RS:
- 170-8071
- Référence fabricant:
- 74HCT373D,652
- Fabricant:
- Nexperia
Spécifications
Documentation technique
Législations et de normes
Détails du produit
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Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Nexperia | |
| Product Type | D Type Latch | |
| Logic Family | 74HCT | |
| Logic Function | D Type | |
| Number of Channels | 8 | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | SO | |
| Minimum Supply Voltage | 4.5V | |
| Pin Count | 20 | |
| Input Level | TTL | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 45ns | |
| Maximum Operating Temperature | 125°C | |
| Series | 74HCT | |
| Standards/Approvals | No | |
| Length | 13mm | |
| Height | 2.45mm | |
| Output Type | 3 State | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Nexperia | ||
Product Type D Type Latch | ||
Logic Family 74HCT | ||
Logic Function D Type | ||
Number of Channels 8 | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type SO | ||
Minimum Supply Voltage 4.5V | ||
Pin Count 20 | ||
Input Level TTL | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 45ns | ||
Maximum Operating Temperature 125°C | ||
Series 74HCT | ||
Standards/Approvals No | ||
Length 13mm | ||
Height 2.45mm | ||
Output Type 3 State | ||
Automotive Standard No | ||
The 74HC373: 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to Interface inputs to voltages in excess of VCC.
Low switch leakage
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