Alliance Memory AS4C32M16D3L-12BCN SDRAM 512 MB Surface, 96-Pin 16 bit FBGA-96 Ball
- N° de stock RS:
- 425-138
- Référence fabricant:
- AS4C32M16D3L-12BCN
- Fabricant:
- Alliance Memory
Sous-total (1 plateau de 190 unités)*
1 057,92 €
(TVA exclue)
1 280,03 €
(TVA incluse)
Informations sur le stock actuellement non accessibles - Veuillez vérifier plus tard
Unité | Prix par unité | le plateau* |
|---|---|---|
| 190 + | 5,568 € | 1 057,92 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 425-138
- Référence fabricant:
- AS4C32M16D3L-12BCN
- Fabricant:
- Alliance Memory
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Alliance Memory | |
| Memory Size | 512MB | |
| Product Type | SDRAM | |
| Data Bus Width | 16bit | |
| Maximum Clock Frequency | 800MHz | |
| Number of Bits per Word | 16 | |
| Maximum Random Access Time | 20ns | |
| Mount Type | Surface | |
| Package Type | FBGA-96 Ball | |
| Minimum Operating Temperature | 0°C | |
| Pin Count | 96 | |
| Maximum Operating Temperature | 95°C | |
| Height | 1mm | |
| Series | AS4C32M16D3L | |
| Standards/Approvals | JEDEC, RoHS | |
| Length | 13mm | |
| Minimum Supply Voltage | 1.283V | |
| Automotive Standard | No | |
| Maximum Supply Voltage | 1.35V | |
| Sélectionner tout | ||
|---|---|---|
Marque Alliance Memory | ||
Memory Size 512MB | ||
Product Type SDRAM | ||
Data Bus Width 16bit | ||
Maximum Clock Frequency 800MHz | ||
Number of Bits per Word 16 | ||
Maximum Random Access Time 20ns | ||
Mount Type Surface | ||
Package Type FBGA-96 Ball | ||
Minimum Operating Temperature 0°C | ||
Pin Count 96 | ||
Maximum Operating Temperature 95°C | ||
Height 1mm | ||
Series AS4C32M16D3L | ||
Standards/Approvals JEDEC, RoHS | ||
Length 13mm | ||
Minimum Supply Voltage 1.283V | ||
Automotive Standard No | ||
Maximum Supply Voltage 1.35V | ||
- Pays d'origine :
- TW
The Alliance Memory 512Mb Double-Data-Rate-3L (DDR3L) DRAMs is double data rate architecture to achieve high-speed operation. The chip is designed to comply with all key DDR3L DRAM key features and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks.
Write Leveling
ZQ Calibration
Dynamic ODT (Rtt_Nom & Rtt_WR)
RoHS compliant
Auto Refresh and Self Refresh
JEDEC Standard Compliant
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