Microchip AT91SAM9G25-CFU-999 ARM926EJ-S Microprocessor SAM9G25 32 bit ARM 400 MHz 247-Pin VFBGA
- N° de stock RS:
- 775-378
- Référence fabricant:
- AT91SAM9G25-CFU-999
- Fabricant:
- Microchip
Sous-total (1 bobine de 1000 unités)*
8 268,00 €
(TVA exclue)
10 004,00 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 90,00 €
Temporairement en rupture de stock
- Expédition à partir du 23 juillet 2026
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | la bobine* |
|---|---|---|
| 1000 + | 8,268 € | 8 268,00 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 775-378
- Référence fabricant:
- AT91SAM9G25-CFU-999
- Fabricant:
- Microchip
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Détails du produit
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Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Microchip | |
| Product Type | Microprocessor | |
| Series | SAM9G25 | |
| Device Core | ARM926EJ-S | |
| Data Bus Width | 32bit | |
| Instruction Set Architecture | ARM | |
| Maximum Clock Frequency | 400MHz | |
| Interface Type | ADC, LCD, SPI, USART, USB | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 0.9V | |
| Package Type | VFBGA | |
| Maximum Supply Voltage | 1.1V | |
| Pin Count | 247 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Number of Cores | 1 | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Microchip | ||
Product Type Microprocessor | ||
Series SAM9G25 | ||
Device Core ARM926EJ-S | ||
Data Bus Width 32bit | ||
Instruction Set Architecture ARM | ||
Maximum Clock Frequency 400MHz | ||
Interface Type ADC, LCD, SPI, USART, USB | ||
Mount Type Surface | ||
Minimum Supply Voltage 0.9V | ||
Package Type VFBGA | ||
Maximum Supply Voltage 1.1V | ||
Pin Count 247 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Number of Cores 1 | ||
Automotive Standard No | ||
- Pays d'origine :
- CN
The Microchip microprocessor is designed for multi-tasking applications, featuring ARM926EJ-S architecture for enhanced execution and management. It offers support for 32-bit and 16-bit instruction sets to optimise performance.
Supports 32-bit ARM and 16-bit Thumb instruction sets for performance and code density
Includes a Memory Management Unit (MMU) for efficient address translation
Harvard architecture with separate instruction and data buses for improved processing
Configurable cache sizes between 4KB and 128KB for optimised memory usage
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