Microchip, 8bit PIC, PIC Microcontroller, 128 kB Flash, 28-Pin SOIC
- N° de stock RS:
- 236-8931
- Référence fabricant:
- PIC18F27K42-I/SO
- Fabricant:
- Microchip
Offre groupée disponible
Sous-total (1 paquet de 5 unités)*
10,92 €
(TVA exclue)
13,215 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
En stock
- Plus 175 unité(s) expédiée(s) à partir du 08 décembre 2025
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | le paquet* |
|---|---|---|
| 5 - 5 | 2,184 € | 10,92 € |
| 10 - 20 | 2,144 € | 10,72 € |
| 25 + | 2,10 € | 10,50 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 236-8931
- Référence fabricant:
- PIC18F27K42-I/SO
- Fabricant:
- Microchip
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Microchip | |
| Family Name | PIC | |
| Package Type | SOIC | |
| Mounting Type | Surface Mount | |
| Pin Count | 28 | |
| Device Core | PIC | |
| Data Bus Width | 8bit | |
| Program Memory Size | 128 kB | |
| Program Memory Type | Flash | |
| Sélectionner tout | ||
|---|---|---|
Marque Microchip | ||
Family Name PIC | ||
Package Type SOIC | ||
Mounting Type Surface Mount | ||
Pin Count 28 | ||
Device Core PIC | ||
Data Bus Width 8bit | ||
Program Memory Size 128 kB | ||
Program Memory Type Flash | ||
The Microchip MCUs integrate a rich set of core independent peripherals, intelligent analog peripherals and large Flash/RAM/EEPROM memories. This devices also offer a host of low power features, performance improvements and design flexibility options that easily and rapidly enable the complex set of functions required by many of today's embedded control applications.
C Compiler optimized RISC architecture
Up to 64 MHz clock input
62.5 ns minimum instruction cycle
Two direct memory access (DMA) controllers
User-programmable source and destination sizes
Hardware and software-triggered data transfers
System bus arbiter with user-configurable
Priorities for scanner and DMA1/DMA2 with respect to the main line and interrupt execution
Vectored Interrupt capability
Selectable high/low priority
Fixed interrupt latency
Programmable vector table base address
31-Level deep hardware stack
Up to 64 MHz clock input
62.5 ns minimum instruction cycle
Two direct memory access (DMA) controllers
User-programmable source and destination sizes
Hardware and software-triggered data transfers
System bus arbiter with user-configurable
Priorities for scanner and DMA1/DMA2 with respect to the main line and interrupt execution
Vectored Interrupt capability
Selectable high/low priority
Fixed interrupt latency
Programmable vector table base address
31-Level deep hardware stack
