STMicroelectronics, 32 bit ARM Cortex M4, STM32G483VE Microcontroller, 170 MHz, 512kB FLASH, 100-Pin LQFP

Sous-total (1 plateau de 90 unités)*

675,27 €

(TVA exclue)

817,11 €

(TVA incluse)

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Prix par unité
le plateau*
90 +7,503 €675,27 €

*Prix donné à titre indicatif

N° de stock RS:
193-9862
Référence fabricant:
STM32G483VET6
Fabricant:
STMicroelectronics
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Marque

STMicroelectronics

Series

STM32G483VE

Product Type

Microcontroller

Package Type

LQFP

Mount Type

Surface

Pin Count

100

Device Core

ARM Cortex M4

Data Bus Width

32bit

Program Memory Size

512kB

Maximum Clock Frequency

170MHz

RAM Size

128kB

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Analogue Comparators

7

DACs

7 x 12 Bit

Length

14.2mm

Width

14.2 mm

Number of Programmable I/Os

107

Standards/Approvals

No

Height

1.45mm

Minimum Supply Voltage

1.71V

Instruction Set Architecture

RISC

Automotive Standard

No

ADCs

26 x 12 Bit

Program Memory Type

FLASH

Number of Timers

2

Pays d'origine :
PH
The STM32G483xE devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 Mhz. The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security. These devices embed high-speed memories (512 Kbytes of Flash memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad SPI Flash memory interface, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection.

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