STMicroelectronics STM32F407IGT7, 32 bit ARM Cortex M4, STM32F407IG Microcontroller, 168 MHz, 1024kB FLASH, 176-Pin LQFP

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12,82 €

(TVA exclue)

15,51 €

(TVA incluse)

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  • Expédition à partir du 20 avril 2026
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1 - 912,82 €
10 - 2411,78 €
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250 +10,43 €

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N° de stock RS:
189-4150
Référence fabricant:
STM32F407IGT7
Fabricant:
STMicroelectronics
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Marque

STMicroelectronics

Product Type

Microcontroller

Series

STM32F407IG

Package Type

LQFP

Mount Type

Surface

Pin Count

176

Device Core

ARM Cortex M4

Data Bus Width

32bit

Program Memory Size

1024kB

Maximum Clock Frequency

168MHz

RAM Size

192kB

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

105°C

DACs

2 x 12 Bit

Number of Programmable I/Os

140

Maximum Power Dissipation Pd

526mW

Width

24.1 mm

Height

1.45mm

Length

24.1mm

Standards/Approvals

No

Minimum Supply Voltage

1.8V

Instruction Set Architecture

RISC

Automotive Standard

No

ADCs

24 x 12 Bit

Program Memory Type

FLASH

Number of Timers

2

The STM32F405xx and STM32F407xx family is based on the high-performance ARM®Cortex®-M4 32-bit RISC core operating at a frequency of up to 168 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all ARM single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security. The STM32F405xx and STM32F407xx family incorporates high-speed embedded memories (Flash memory up to 1 Mbyte, up to 192 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix. All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers. a true random number generator (RNG). They also feature standard and advanced communication interfaces.

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