STMicroelectronics, 32bit ARM Cortex M7, STM32F7 Microcontroller, 216MHz, 512 kB Flash, 100-Pin LQFP

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9,80 €

(TVA exclue)

11,86 €

(TVA incluse)

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  • Expédition à partir du 14 avril 2026
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1 - 99,80 €
10 - 248,86 €
25 - 998,44 €
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250 +7,26 €

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N° de stock RS:
135-8260
Référence fabricant:
STM32F722VET6
Fabricant:
STMicroelectronics
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Marque

STMicroelectronics

Family Name

STM32F7

Package Type

LQFP

Mounting Type

Surface Mount

Pin Count

100

Device Core

ARM Cortex M7

Data Bus Width

32bit

Program Memory Size

512 kB

Maximum Frequency

216MHz

RAM Size

256 kB

USB Channels

1

Number of SPI Channels

5

Number of USART Channels

4

Typical Operating Supply Voltage

1.7 → 3.6 V

Number of I2C Channels

3

Number of CAN Channels

1

Number of UART Channels

4

Number of LIN Channels

0

Height

1.45mm

Width

14.2mm

Dimensions

14.2 x 14.2 x 1.45mm

Program Memory Type

Flash

Number of PCI Channels

0

Number of Ethernet Channels

0

Instruction Set Architecture

DSP

Minimum Operating Temperature

-40 °C

Maximum Operating Temperature

+85 °C

Number of ADC Units

1

ADCs

3 x 12 bit

Length

14.2mm

STM32F7 Series Microcontrollers, STMicroelectronics


The STM32F7xx microcontrollers are based on the high-performance ARM Cortex-M7 32-bit RISC core.


The STM32F7 microcontrollers feature ST’s ART Accelerator™ as well as an L1 cache and deliver the maximum theoretical performance of the ARM Cortex-M7 core, regardless if code is executed from embedded Flash or external memory. Typical performance figures: 1082 CoreMark / 462 DMIPS at 216MHz clock frequency.


AXI and multi-AHB bus matrixes for interconnecting core, peripherals and memories
Double-Precision Floating-Point maths unit on some variants
Up to 16KB +16KB of I-cache and D-cache
Up to 2MB of embedded Flash memory, with Read-While-Write capability on certain devices
Up to 512KB of data memory, including up to 128KB of Tightly-Coupled Memory for Data (DTCM) for Stacks, Heaps
16KB of Tightly-Coupled Memory for Instructions (ITCM) for time-critical routines
4KB of backup SRAM to keep data in the lowest power modes
Peripheral speed is independent from CPU speed (dual clock support)
Protected code execution feature (PC-ROP) on some variants
Power Efficiency: 7 CoreMark/mW at +1.8Vdc