STMicroelectronics, 32 bit ARM Cortex M7, STM32F72 Microcontroller, 216 MHz, 512kB FLASH, 144-Pin LQFP

Sous-total 1 unité (conditionné en plateau)*

11,30 €

(TVA exclue)

13,67 €

(TVA incluse)

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*Prix donné à titre indicatif

Options de conditionnement :
N° de stock RS:
135-8234P
Référence fabricant:
STM32F723ZET6
Fabricant:
STMicroelectronics
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Marque

STMicroelectronics

Product Type

Microcontroller

Series

STM32F72

Package Type

LQFP

Mount Type

Surface

Pin Count

144

Device Core

ARM Cortex M7

Data Bus Width

32bit

Program Memory Size

512kB

Interface Type

USB, USART, UART, SPI, SDM, SAI, I2S, I2C, CAN

Maximum Clock Frequency

216MHz

RAM Size

256kB

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Maximum Power Dissipation Pd

1.58W

Length

20.2mm

Width

20.2 mm

DACs

2 x 12 Bit

Number of Programmable I/Os

140

Standards/Approvals

ISO7816, LIN, SMBus/PMBus, IrDA

Height

1.45mm

Minimum Supply Voltage

1.7V

ADCs

3 x 12 bit

Automotive Standard

No

Number of Timers

2

Instruction Set Architecture

DSP

Program Memory Type

FLASH

STM32F7 Series Microcontrollers, STMicroelectronics


The STM32F7xx microcontrollers are based on the high-performance ARM Cortex-M7 32-bit RISC core.

The STM32F7 microcontrollers feature ST’s ART Accelerator™ as well as an L1 cache and deliver the maximum theoretical performance of the ARM Cortex-M7 core, regardless if code is executed from embedded Flash or external memory. Typical performance figures: 1082 CoreMark / 462 DMIPS at 216MHz clock frequency.

AXI and multi-AHB bus matrixes for interconnecting core, peripherals and memories

Double-Precision Floating-Point maths unit on some variants

Up to 16KB +16KB of I-cache and D-cache

Up to 2MB of embedded Flash memory, with Read-While-Write capability on certain devices

Up to 512KB of data memory, including up to 128KB of Tightly-Coupled Memory for Data (DTCM) for Stacks, Heaps

16KB of Tightly-Coupled Memory for Instructions (ITCM) for time-critical routines

4KB of backup SRAM to keep data in the lowest power modes

Peripheral speed is independent from CPU speed (dual clock support)

Protected code execution feature (PC-ROP) on some variants

Power Efficiency: 7 CoreMark/mW at +1.8Vdc