Toshiba 74HC21D, 2 4-Input AND CMOS Digital Integrated Circuit, 14-Pin SOIC
- N° de stock RS:
- 171-3575
- Référence fabricant:
- 74HC21D
- Fabricant:
- Toshiba
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- N° de stock RS:
- 171-3575
- Référence fabricant:
- 74HC21D
- Fabricant:
- Toshiba
Spécifications
Documentation technique
Législations et de normes
Détails du produit
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Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Toshiba | |
| Product Type | CMOS Digital Integrated Circuit | |
| Logic Function | AND | |
| Mount Type | Surface | |
| Number of Elements | 2 | |
| Number of Inputs per Gate | 4 | |
| Schmitt Trigger Input | No | |
| Package Type | SOIC | |
| Pin Count | 14 | |
| Logic Family | 74HC | |
| Input Type | CMOS | |
| Maximum High Level Output Current | -5.2mA | |
| Minimum Operating Temperature | -40°C | |
| Maximum Propagation Delay Time @ CL | 25ns | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Width | 3.9mm | |
| Series | 74HC | |
| Length | 8.95mm | |
| Height | 1.38mm | |
| Minimum Supply Voltage | 2V | |
| Maximum Supply Voltage | 6V | |
| Maximum Low Level Output Current | 5.2mA | |
| Automotive Standard | No | |
| Output Type | CMOS, Buffer | |
| Sélectionner tout | ||
|---|---|---|
Marque Toshiba | ||
Product Type CMOS Digital Integrated Circuit | ||
Logic Function AND | ||
Mount Type Surface | ||
Number of Elements 2 | ||
Number of Inputs per Gate 4 | ||
Schmitt Trigger Input No | ||
Package Type SOIC | ||
Pin Count 14 | ||
Logic Family 74HC | ||
Input Type CMOS | ||
Maximum High Level Output Current -5.2mA | ||
Minimum Operating Temperature -40°C | ||
Maximum Propagation Delay Time @ CL 25ns | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Width 3.9mm | ||
Series 74HC | ||
Length 8.95mm | ||
Height 1.38mm | ||
Minimum Supply Voltage 2V | ||
Maximum Supply Voltage 6V | ||
Maximum Low Level Output Current 5.2mA | ||
Automotive Standard No | ||
Output Type CMOS, Buffer | ||
The 74HC21D is a high speed CMOS 4-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including buffer an output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage
High speed: tpd = 10 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 1.0 μA (max) Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
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