Toshiba 74HC08D, Quad 2-Input AND Logic Gate, 14-Pin SOIC
- N° de stock RS:
- 171-3377
- Référence fabricant:
- 74HC08D
- Fabricant:
- Toshiba
Actuellement indisponible
Nous ne savons pas si cet article sera de nouveau disponible. RS a l'intention de le retirer de son assortiment sous peu.
- N° de stock RS:
- 171-3377
- Référence fabricant:
- 74HC08D
- Fabricant:
- Toshiba
Spécifications
Documentation technique
Législations et de normes
Détails du produit
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Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Toshiba | |
| Logic Function | AND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Package Type | SOIC | |
| Pin Count | 14 | |
| Logic Family | 74HC | |
| Maximum Operating Supply Voltage | 6 V | |
| Maximum High Level Output Current | -5.2mA | |
| Maximum Propagation Delay Time @ Maximum CL | 135 ns @ 50 pF | |
| Minimum Operating Supply Voltage | 2 V | |
| Maximum Low Level Output Current | 5.2mA | |
| Width | 3.9mm | |
| Maximum Operating Temperature | +125 °C | |
| Minimum Operating Temperature | -40 °C | |
| Dimensions | 8.95 x 3.9 x 1.38mm | |
| Propagation Delay Test Condition | 50pF | |
| Length | 8.95mm | |
| Output Type | Buffer, CMOS | |
| Height | 1.38mm | |
| Sélectionner tout | ||
|---|---|---|
Marque Toshiba | ||
Logic Function AND | ||
Mounting Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Package Type SOIC | ||
Pin Count 14 | ||
Logic Family 74HC | ||
Maximum Operating Supply Voltage 6 V | ||
Maximum High Level Output Current -5.2mA | ||
Maximum Propagation Delay Time @ Maximum CL 135 ns @ 50 pF | ||
Minimum Operating Supply Voltage 2 V | ||
Maximum Low Level Output Current 5.2mA | ||
Width 3.9mm | ||
Maximum Operating Temperature +125 °C | ||
Minimum Operating Temperature -40 °C | ||
Dimensions 8.95 x 3.9 x 1.38mm | ||
Propagation Delay Test Condition 50pF | ||
Length 8.95mm | ||
Output Type Buffer, CMOS | ||
Height 1.38mm | ||
The 74HC08D is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gateC2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the 74HC00D but the inputs have 25% VCC hysteresis and with its schmitt trigger inputs, the 74HC132D can be used as a line receiver for slow input signals. All inputs are equipped with protection circuits against static discharge or transient excess voltage.
High speed: tpd = 6 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 1.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
Low power dissipation: ICC = 1.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V