Texas Instruments SN74LVC1G00DBVT 2-Input NAND Logic Gate, 5-Pin SOT-23
- N° de stock RS:
- 145-7571
- Référence fabricant:
- SN74LVC1G00DBVT
- Fabricant:
- Texas Instruments
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- N° de stock RS:
- 145-7571
- Référence fabricant:
- SN74LVC1G00DBVT
- Fabricant:
- Texas Instruments
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Détails du produit
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Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Texas Instruments | |
| Logic Function | NAND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 1 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | No | |
| Package Type | SOT-23 | |
| Pin Count | 5 | |
| Logic Family | LVC | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum High Level Output Current | -32mA | |
| Maximum Propagation Delay Time @ Maximum CL | 4 ns @ 5 V, 4.7 ns @ 3.3 V | |
| Minimum Operating Supply Voltage | 1.65 V | |
| Maximum Low Level Output Current | 32mA | |
| Height | 1.15mm | |
| Width | 1.6mm | |
| Maximum Operating Temperature | +85 °C | |
| Propagation Delay Test Condition | 50pF | |
| Minimum Operating Temperature | -40 °C | |
| Dimensions | 2.9 x 1.6 x 1.15mm | |
| Length | 2.9mm | |
| Sélectionner tout | ||
|---|---|---|
Marque Texas Instruments | ||
Logic Function NAND | ||
Mounting Type Surface Mount | ||
Number of Elements 1 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input No | ||
Package Type SOT-23 | ||
Pin Count 5 | ||
Logic Family LVC | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum High Level Output Current -32mA | ||
Maximum Propagation Delay Time @ Maximum CL 4 ns @ 5 V, 4.7 ns @ 3.3 V | ||
Minimum Operating Supply Voltage 1.65 V | ||
Maximum Low Level Output Current 32mA | ||
Height 1.15mm | ||
Width 1.6mm | ||
Maximum Operating Temperature +85 °C | ||
Propagation Delay Test Condition 50pF | ||
Minimum Operating Temperature -40 °C | ||
Dimensions 2.9 x 1.6 x 1.15mm | ||
Length 2.9mm | ||
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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