Nexperia Flip Flop IC HC, CMOS, 14-Pin SO-14
- N° de stock RS:
- 243-4416P
- Référence fabricant:
- 74HC73D-Q100J
- Fabricant:
- Nexperia
Offre groupée disponible
Consulter les options de prix de grosSous-total 50 unités (conditionné en bande continue)*
17,25 €
(TVA exclue)
20,85 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 90,00 €
En stock
- Plus 1 075 unité(s) expédiée(s) à partir du 27 août 2026
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Unité | Prix par unité |
|---|---|
| 50 - 75 | 0,345 € |
| 100 - 225 | 0,27 € |
| 250 - 975 | 0,252 € |
| 1000 + | 0,171 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 243-4416P
- Référence fabricant:
- 74HC73D-Q100J
- Fabricant:
- Nexperia
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Nexperia | |
| Product Type | Flip Flop IC | |
| Logic Family | HC | |
| Input Type | Single Ended | |
| Output Type | CMOS | |
| Polarity | Negative | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2V | |
| Package Type | SO-14 | |
| Pin Count | 14 | |
| Maximum Supply Voltage | 6V | |
| Minimum Operating Temperature | -40°C | |
| Flip-Flop Type | JK Type | |
| Trigger Type | Negative Edge | |
| Maximum Operating Temperature | 125°C | |
| Standards/Approvals | HBM JESD22-A114F, AEC-Q100 (Grade 1), JEDEC Standards JESD8C (2.7 V to 3.6 V), JESD7A (2.0 V to 6.0 V), MM JESD22-A115-A | |
| Series | 74HC73-Q100 | |
| Automotive Standard | AEC-Q100 Grade 1 | |
| Sélectionner tout | ||
|---|---|---|
Marque Nexperia | ||
Product Type Flip Flop IC | ||
Logic Family HC | ||
Input Type Single Ended | ||
Output Type CMOS | ||
Polarity Negative | ||
Mount Type Surface | ||
Minimum Supply Voltage 2V | ||
Package Type SO-14 | ||
Pin Count 14 | ||
Maximum Supply Voltage 6V | ||
Minimum Operating Temperature -40°C | ||
Flip-Flop Type JK Type | ||
Trigger Type Negative Edge | ||
Maximum Operating Temperature 125°C | ||
Standards/Approvals HBM JESD22-A114F, AEC-Q100 (Grade 1), JEDEC Standards JESD8C (2.7 V to 3.6 V), JESD7A (2.0 V to 6.0 V), MM JESD22-A115-A | ||
Series 74HC73-Q100 | ||
Automotive Standard AEC-Q100 Grade 1 | ||
The Nexperia dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output high. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
CMOS low-power dissipation
Wide supply voltage range from 2.0 to 6.0 V
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Liens connexes
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