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Sélectionner tout	Attribut	Valeur
	Marque	Toshiba
	Logic Family	74VHC
	Product Type	Flip Flop IC
	Input Type	TTL, CMOS
	Output Type	CMOS
	Clock Frequency	70MHz
	Polarity	Inverting
	Mount Type	Surface
	Package Type	TSSOP
	Minimum Supply Voltage	2V
	Pin Count	14
	Maximum Supply Voltage	5.5V
	Trigger Type	Positive Edge
	Flip-Flop Type	D Flip-Flop
	Maximum Propagation Delay Time @ CL	12ns
	Minimum Operating Temperature	-40°C
	Number of Elements per Chip	2
	Maximum Operating Temperature	125°C
	Standards/Approvals	No
	Series	74VHC74FT
	Length	5mm
	Height	1mm
	Automotive Standard	AEC-Q100

	Sélectionner tout
	Marque Toshiba
	Logic Family 74VHC
	Product Type Flip Flop IC
	Input Type TTL, CMOS
	Output Type CMOS
	Clock Frequency 70MHz
	Polarity Inverting
	Mount Type Surface
	Package Type TSSOP
	Minimum Supply Voltage 2V
	Pin Count 14
	Maximum Supply Voltage 5.5V
	Trigger Type Positive Edge
	Flip-Flop Type D Flip-Flop
	Maximum Propagation Delay Time @ CL 12ns
	Minimum Operating Temperature -40°C
	Number of Elements per Chip 2
	Maximum Operating Temperature 125°C
	Standards/Approvals No
	Series 74VHC74FT
	Length 5mm
	Height 1mm
	Automotive Standard AEC-Q100

The 74VHC74FT is an advanced high speed CMOS D-FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are accomplished by setting the appropriate input low. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages.

Wide operating temperature range: Topr = -40 to 125 

High speed: fMAX = 185 MHz (typ.) at VCC = 5.0 V

Low power dissipation: ICC = 4.0 μA (max) at Ta = 25

High noise immunity: VNIH = VNIL = 28 % VCC (min)

Power-down protection is provided on all inputs.

Balanced propagation delays: tPLH ≈ tPHL

Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V

Low noise: VOLP = 1.0 V (max)

Pin and function compatible with the 74 series (74AC/HC/AHC/LV etc.) 74 type

Toshiba 2 Flip Flop IC 74VHC, CMOS, 14-Pin TSSOP

Frais de livraison offerts pour toute commande de plus de 90,00 €

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