Infineon NOR 64 MB SPI Flash Memory 8-Pin SOIC, S25FL064LABMFI013
- N° de stock RS:
- 215-5783
- Référence fabricant:
- S25FL064LABMFI013
- Fabricant:
- Infineon
Actuellement indisponible
Désolés, nous ne savons pas quand ce produit sera réapprovisionné.
- N° de stock RS:
- 215-5783
- Référence fabricant:
- S25FL064LABMFI013
- Fabricant:
- Infineon
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Infineon | |
| Product Type | Flash Memory | |
| Memory Size | 64MB | |
| Interface Type | SPI | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Maximum Clock Frequency | 108MHz | |
| Mount Type | Surface | |
| Cell Type | NOR | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Supply Voltage | 2.7V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Height | 1.9mm | |
| Length | 5.28mm | |
| Standards/Approvals | No | |
| Series | S25FL | |
| Number of Bits per Word | 8 | |
| Number of Words | 8M | |
| Automotive Standard | AEC-Q100 | |
| Maximum Random Access Time | 8ns | |
| Sélectionner tout | ||
|---|---|---|
Marque Infineon | ||
Product Type Flash Memory | ||
Memory Size 64MB | ||
Interface Type SPI | ||
Package Type SOIC | ||
Pin Count 8 | ||
Maximum Clock Frequency 108MHz | ||
Mount Type Surface | ||
Cell Type NOR | ||
Maximum Supply Voltage 3.6V | ||
Minimum Supply Voltage 2.7V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Height 1.9mm | ||
Length 5.28mm | ||
Standards/Approvals No | ||
Series S25FL | ||
Number of Bits per Word 8 | ||
Number of Words 8M | ||
Automotive Standard AEC-Q100 | ||
Maximum Random Access Time 8ns | ||
The Cypress Semiconductor FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO), and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.
Serial Peripheral Interface (SPI) with Multi-I/O
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
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