Renesas Electronics FIFO Memory, 28-Pin PDIP, 7202LA12TPG
- N° de stock RS:
- 262-8981
- Référence fabricant:
- 7202LA12TPG
- Fabricant:
- Renesas Electronics
Offre groupée disponible
Sous-total (1 unité)*
13,75 €
(TVA exclue)
16,64 €
(TVA incluse)
Informations sur le stock actuellement non accessibles - Veuillez vérifier plus tard
Unité | Prix par unité |
|---|---|
| 1 - 4 | 13,75 € |
| 5 - 9 | 13,48 € |
| 10 - 27 | 12,73 € |
| 28 - 55 | 12,55 € |
| 56 + | 12,40 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 262-8981
- Référence fabricant:
- 7202LA12TPG
- Fabricant:
- Renesas Electronics
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Renesas Electronics | |
| Product Type | FIFO Memory | |
| Data Bus Width | 9bit | |
| Access Time | 12ns | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 4.5V | |
| Package Type | PDIP | |
| Maximum Supply Voltage | 5.5V | |
| Pin Count | 28 | |
| Bus Direction | Bi-Directional | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Series | IDT7202LA | |
| Height | 2.79mm | |
| Standards/Approvals | No | |
| Length | 34.3mm | |
| Number of Bits per Word | 9 | |
| Supply Current | 80mA | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Renesas Electronics | ||
Product Type FIFO Memory | ||
Data Bus Width 9bit | ||
Access Time 12ns | ||
Mount Type Surface | ||
Minimum Supply Voltage 4.5V | ||
Package Type PDIP | ||
Maximum Supply Voltage 5.5V | ||
Pin Count 28 | ||
Bus Direction Bi-Directional | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Series IDT7202LA | ||
Height 2.79mm | ||
Standards/Approvals No | ||
Length 34.3mm | ||
Number of Bits per Word 9 | ||
Supply Current 80mA | ||
Automotive Standard No | ||
- Pays d'origine :
- TH
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Pin and functionally compatible with 720X family
Low power consumption
Ultra high speed 12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
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