Renesas Electronics 72 kB FIFO Memory, 32-Pin PLCC

The Renesas Electronics memory buffers are dual-port with internal pointers that load and empty data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. Data is toggled in and out of the device through the use of the Write (W) and Read (R) pins. The device's 9-bit width provides a bit for a control or parity at the user’s option. It also features a Retransmit (RT) capability that allows the read pointer to be reset to its initial position when RT is pulsed LOW. A Half-Full Flag is available in the single device and width expansion modes. They are designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing, rate buffering and other applications.

These FIFOs are fabricated using high-speed CMOS technology