Nexperia 74HC4094PW,118 1 Surface Shift Register 74HC TSSOP, 16-Pin
- N° de stock RS:
- 170-5422
- Référence fabricant:
- 74HC4094PW,118
- Fabricant:
- Nexperia
Offre groupée disponible
Sous-total (1 paquet de 25 unités)*
9,675 €
(TVA exclue)
11,70 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 90,00 €
Temporairement en rupture de stock
- Expédition à partir du 10 novembre 2026
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | le paquet* |
|---|---|---|
| 25 - 100 | 0,387 € | 9,68 € |
| 125 - 225 | 0,23 € | 5,75 € |
| 250 - 725 | 0,219 € | 5,48 € |
| 750 - 1475 | 0,208 € | 5,20 € |
| 1500 + | 0,18 € | 4,50 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 170-5422
- Référence fabricant:
- 74HC4094PW,118
- Fabricant:
- Nexperia
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Nexperia | |
| Product Type | Shift Register | |
| Package Type | TSSOP | |
| Logic Family | 74HC | |
| Mount Type | Surface | |
| Number of Elements | 1 | |
| Minimum Supply Voltage | 2V | |
| Pin Count | 16 | |
| Maximum Supply Voltage | 6V | |
| Trigger Type | Positive Edge | |
| Maximum Operating Temperature | 125°C | |
| Length | 5.1mm | |
| Standards/Approvals | No | |
| Series | 74HC4094 | |
| Height | 1.1mm | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Nexperia | ||
Product Type Shift Register | ||
Package Type TSSOP | ||
Logic Family 74HC | ||
Mount Type Surface | ||
Number of Elements 1 | ||
Minimum Supply Voltage 2V | ||
Pin Count 16 | ||
Maximum Supply Voltage 6V | ||
Trigger Type Positive Edge | ||
Maximum Operating Temperature 125°C | ||
Length 5.1mm | ||
Standards/Approvals No | ||
Series 74HC4094 | ||
Height 1.1mm | ||
Automotive Standard No | ||
The 74HC4094 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow.
Simple control Interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Displays
Control units
Liens connexes
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