Renesas Electronics 9FGV0441AKILF PLL Clock Generator 4 32-Pin VFQFPN
- N° de stock RS:
- 262-9023
- Référence fabricant:
- 9FGV0441AKILF
- Fabricant:
- Renesas Electronics
Offre groupée disponible
Sous-total (1 plateau de 490 unités)*
847,70 €
(TVA exclue)
1 024,10 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 90,00 €
En stock
- 980 unité(s) prête(s) à être expédiée(s) d'un autre centre de distribution
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | le plateau* |
|---|---|---|
| 490 - 490 | 1,73 € | 847,70 € |
| 980 + | 1,522 € | 745,78 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 262-9023
- Référence fabricant:
- 9FGV0441AKILF
- Fabricant:
- Renesas Electronics
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Renesas Electronics | |
| Product Type | PLL Clock Generator | |
| Mount Type | Surface | |
| Package Type | VFQFPN | |
| Pin Count | 32 | |
| Maximum Input Frequency | 27MHz | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Length | 4mm | |
| Height | 1mm | |
| Series | 9FGV0441 | |
| Standards/Approvals | RoHS | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Renesas Electronics | ||
Product Type PLL Clock Generator | ||
Mount Type Surface | ||
Package Type VFQFPN | ||
Pin Count 32 | ||
Maximum Input Frequency 27MHz | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Length 4mm | ||
Height 1mm | ||
Series 9FGV0441 | ||
Standards/Approvals RoHS | ||
Automotive Standard No | ||
The Renesas Electronics PCIE GEN123 CLK GEN is an 4-output very low power clock generator for PCIe Gen1–4 applications with integrated output terminations providing Zo = 100Ω. The device has 4 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.
Integrated terminations provide 100Ω differential Zo reduced component count and board space
1.8V operation reduced power consumption
OE pins support DIF power management
LP-HCSL differential clock outputs reduced power and board space
Programmable slew rate for each output allows tuning for various line lengths
Programmable output amplitude allows tuning for various application environments
DIF outputs blocked until PLL is locked clean system start-up
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