8T49N287A-998NLGI, Clock Translator HCSL, LVDS, 2-Input, 56-Pin 56-Lead VFQFN, Lead-Free
- N° de stock RS:
- 264-3521
- Référence fabricant:
- 8T49N287A-998NLGI
- Fabricant:
- Renesas Electronics
Sous-total (1 plateau de 260 unités)*
3 142,36 €
(TVA exclue)
3 802,24 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
Temporairement en rupture de stock
- Expédition à partir du 04 mai 2026
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | le plateau* |
|---|---|---|
| 260 + | 12,086 € | 3 142,36 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 264-3521
- Référence fabricant:
- 8T49N287A-998NLGI
- Fabricant:
- Renesas Electronics
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Renesas Electronics | |
| Logic Family | HCSL, LVDS | |
| Logic Function | Translator | |
| Input Signal Type | HCSL, LVDS, LVPECL | |
| Output Logic Level | HCSL, LVDS, LVPECL | |
| Operation Mode | Differential, Single Ended | |
| Number of Clock Inputs | 2 | |
| Package Type | 56-Lead VFQFN, Lead-Free | |
| Pin Count | 56 | |
| Sélectionner tout | ||
|---|---|---|
Marque Renesas Electronics | ||
Logic Family HCSL, LVDS | ||
Logic Function Translator | ||
Input Signal Type HCSL, LVDS, LVPECL | ||
Output Logic Level HCSL, LVDS, LVPECL | ||
Operation Mode Differential, Single Ended | ||
Number of Clock Inputs 2 | ||
Package Type 56-Lead VFQFN, Lead-Free | ||
Pin Count 56 | ||
- Pays d'origine :
- TW
The Renesas Electronics 8T49N287 series has two independent fractional feedback PLLs that can be used as jitter attenuators and frequency translators. It is equipped with six integer and two fractional output dividers which allowing the generation of up to 8 different output frequencies is ranging from 8kHz to 1GHz. Four of these frequencies are completely independent of each other and the inputs. The eight outputs may select among LVPECL LVDS HCSL or LVCMOS output levels.
Supports SDH or SONET and Synchronous Ethernet clocks including all FEC rate conversions
Phase slope limiting and fully hitless switching options to control output phase transients
Programmable output phase delays in steps as small as 16ps
Phase slope limiting and fully hitless switching options to control output phase transients
Programmable output phase delays in steps as small as 16ps
Liens connexes
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