49FCT3805APYGI, PLL Clock Driver CMOS, 10-Input, 20-Pin SSOP
- N° de stock RS:
- 217-7819
- Référence fabricant:
- 49FCT3805APYGI
- Fabricant:
- Renesas Electronics
Offre groupée disponible
Sous-total (1 tube de 64 unités)*
57,92 €
(TVA exclue)
70,08 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
En stock
- Plus 704 unité(s) expédiée(s) à partir du 22 janvier 2026
Besoin de plus? Cliquez sur " Vérifier les dates de livraison " pour plus de détails
Unité | Prix par unité | le tube* |
|---|---|---|
| 64 - 64 | 0,905 € | 57,92 € |
| 128 - 448 | 0,695 € | 44,48 € |
| 512 - 960 | 0,613 € | 39,23 € |
| 1024 - 2496 | 0,484 € | 30,98 € |
| 2560 + | 0,452 € | 28,93 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 217-7819
- Référence fabricant:
- 49FCT3805APYGI
- Fabricant:
- Renesas Electronics
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Renesas Electronics | |
| Logic Family | CMOS | |
| Logic Function | Clock Driver | |
| Input Signal Type | TTL | |
| Output Logic Level | TTL | |
| Number of Clock Inputs | 10 | |
| Package Type | SSOP | |
| Pin Count | 20 | |
| Sélectionner tout | ||
|---|---|---|
Marque Renesas Electronics | ||
Logic Family CMOS | ||
Logic Function Clock Driver | ||
Input Signal Type TTL | ||
Output Logic Level TTL | ||
Number of Clock Inputs 10 | ||
Package Type SSOP | ||
Pin Count 20 | ||
The Renesas Electronics FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical.
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
VCC = 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
VCC = 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages