Infineon Clock Buffer 8-Pin SOIC
- N° de stock RS:
- 273-7329
- Référence fabricant:
- CY2305SXI-1H
- Fabricant:
- Infineon
Offre groupée disponible
Sous-total (1 unité)*
3,17 €
(TVA exclue)
3,84 €
(TVA incluse)
Frais de livraison offerts pour toute commande de plus de 75,00 €
Dernier stock RS
- 1 162 dernière(s) unité(s), prête(s) à l'envoi d'un autre centre de distribution
Unité | Prix par unité |
|---|---|
| 1 - 9 | 3,17 € |
| 10 - 24 | 2,77 € |
| 25 - 49 | 2,72 € |
| 50 - 99 | 2,65 € |
| 100 + | 2,34 € |
*Prix donné à titre indicatif
- N° de stock RS:
- 273-7329
- Référence fabricant:
- CY2305SXI-1H
- Fabricant:
- Infineon
Spécifications
Documentation technique
Législations et de normes
Détails du produit
Recherchez des produits similaires en sélectionnant un ou plusieurs attributs.
Sélectionner tout | Attribut | Valeur |
|---|---|---|
| Marque | Infineon | |
| Product Type | Clock Buffer | |
| Maximum Input Frequency | 133MHz | |
| Maximum Propagation Delay Time | 8.7ns | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Number of Outputs | 8 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Standards/Approvals | No | |
| Width | 4.8 mm | |
| Height | 1.5mm | |
| Length | 5.84mm | |
| Series | CY2305 | |
| Automotive Standard | No | |
| Sélectionner tout | ||
|---|---|---|
Marque Infineon | ||
Product Type Clock Buffer | ||
Maximum Input Frequency 133MHz | ||
Maximum Propagation Delay Time 8.7ns | ||
Mount Type Surface | ||
Package Type SOIC | ||
Pin Count 8 | ||
Number of Outputs 8 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Standards/Approvals No | ||
Width 4.8 mm | ||
Height 1.5mm | ||
Length 5.84mm | ||
Series CY2305 | ||
Automotive Standard No | ||
The Infineon Zero delay buffer designed to distribute high speed clocks. It accepts one reference input, and drives out five low skew clocks. All parts have on chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on chip and is obtained from the CLKOUT pad. This buffer devices can accept the same input clock and distribute it. In this case, the skew between the outputs of two devices is guaranteed to be less than 700 ps.
60 ps typical cycle to cycle jitter
Zero input output propagation delay
Test mode to bypass phase locked loop
Compatible with Pentium based systems
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