Programmable array logic (PAL) are semiconductors that are used to implement combinational logic circuits. They have a programmable AND gate array with fixed OR gate array. PAL's contain PROM (programmable read only memory) and output logic. PAL is a group of PLD (programmable logic device). They are also faster due to only having a single programmable array.
Programmable array logic is typically cheaper to produce and buy rather than the conventional programmable logic array (PLA). Compared to other programmable logic devices (PLD) they typically have higher efficiency, high reliability with only 1 programmable gate, less power consumption and more secure.
With the PAL being easier to program than a PLA there are multiple languages to program PALs in. These include PAL assembler (PALASM), Advanced Boolean expression language (ABEL) and universal programmable logic (CUPL). Programming PAL is very similar to PLA programming, except only the AND gate array needs to be programmed on the PAL.
A PLA (Programmable Logic Array) has both an AND array gate and an OR gate array both available to be programmed, whereas PAL only allows the AND array to be programmed. Other differences include that PLA is slower, less efficient on power consumption and less prolific.
Programmable array logic circuits are typically used in an FPGA (Field Programmable Gate Array). This allows for accelerated testing of systems through programs such as Xilinx. With the PAL being arranged in an FPGA you can compile test and edit very quickly compared to other arrangements.