- N° de stock RS:
- 171-3556P
- Référence fabricant:
- 74HC138D
- Fabricant:
- Toshiba
- N° de stock RS:
- 171-3556P
- Référence fabricant:
- 74HC138D
- Fabricant:
- Toshiba
Documentation technique
Législations et de normes
Détails du produit
The 74HC138D is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs (Y0 - Y7) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and alloutputs go high.G1, G2A, and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. All inputs are equipped with protection circuits against static discharge or transient excess voltage
High speed: tpd = 16 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 4.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
Low power dissipation: ICC = 4.0 μA (max) at Ta = 25
Balanced propagation delays: tPLH ≈ tPHL
Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
Spécifications
Attribut | Valeur |
---|---|
Mounting Type | Surface Mount |
Package Type | SOIC |
Pin Count | 16 |
Dimensions | 10.2 x 3.9 x 1.38mm |
Maximum Operating Supply Voltage | 6 V |
Maximum Operating Temperature | +125 °C |
Minimum Operating Temperature | -40 °C |
Minimum Operating Supply Voltage | 2 V |