SY89853UMG, Clock Buffer LVPECL, 1-Input, 32-Pin QFN

The SY89853U features two, low jitter 2:1 differential multiplexers with 100K LVPECL (800mV) compatible outputs, capable of handling clocks up to 2.5GHz and data streams up to 2.5Gbps. The SY89853U differential inputs include Micrel's unique, 3-input termination architecture that allows users to interface to any differential signal (AC- or DC-Coupled) as small as 100mV without any level shifting or termination resistors networks in the signal path. The result is a clean, stub-free, low jitter interface solution.

Dual 2:1 MUX, each channel selects from inputs
Unique, patent-pending input isolation design minimizes crosstalk
Low power 210mW (VCC = 2.5V)
Guaranteed AC performance over temperature and voltage:
DC-to- >2.5Gbps data rate throughput
Unique, patent-pending 50Ω input termination and VT pin accepts DC- and AC-coupled inputs (CML, LVDS, PECL)
800mV LVPECL output swing
Power supply 2.5V ±5% or 3.3V ±10%
-40°C to +85°C temperature range